EP3C25Q240C8 T3C25-V5FGPA Development Board Kit Price buy introduction Info|Study-Dev-FPGA-board

1.1 EP3C25Q240C8 T3C25-V5FGPA Development Board Kit Introduction

T3C25-V5、T3C16-V5 FGPA Development Board Kit using altera new CycloneIII series FPGA,65nm manufacturing process,it has lower power consumption,and it can be integrated with more resources.

1.2 65nmDetails of EP3C25Q240C8 T3C25-V5FGPA Development Board Kit

1. There are a variety of core board to choose:
2. Cyclone core:EP1C12Q240C8、EP1C6Q240C8;
3. CycloneII core:EP2C8Q208C8、EP2C5Q208C8、EP2C20Q208C8； CycloneIII core:EP3C16Q240C8、EP3C25Q240C8;
4. SDRAM：8MByte；
5. Flash：8MByte；
6. EPCS1、EPCS4、EPCS16 configuration chip;
7. Provide configuration mode:JTAG and AS;
8. One or two 50Mhz active clock;
9. All IO,Avalon bus,configuration and tube through 4 platooninsert needle derivation, users can play freely and more flexibly.
10. 4 LEDs;
11. A reset button.

1.3 EP3C25Q240C8 T3C25-V5FGPA development board kit experiment board V5.0

• Ethernet network interface:10M RTL8019 chip;
• 8 AD adc
• 4 channel 8 bits of DA digital-to-analog converters,
• Real-time clock,
• RS - 232 serial:used for data communication with computers,
• VGA interface:direct VGA display,and with FPGA realizing VGA interface protocols can display displays text pattern,etc.
• PS/2 mouse and keyboard interface.
• 16*2 character type LCD display interface can be English characters.
• 128*64 dot-matrix LCD interface,can display Chinese, graphics, etc.
• Buzzer.
• USB interface:the USB - UART chip,bridging CP2102 USB1.1 compatible with USB2.0 agreement,the highest rate of communication for 1Mbps,can be applied directly to the requirement of high rate of communication occasions,such as industrial equipment,instrumentation, convenient and practical,etc.Developers need to USB protocol and design driver,just like to operate as serial communication,so that can be short development cycle,small risk,low cost,In addition,it is small,anti-jamming performance is good,stable and reliable,and the normal operating temperature range for:- 40~+ 85 degrees.As the package of the chip with manual,driver,data and the example program.
• Two four seven digital tube.
• Based on the I2C EEPROM memory of the agreement.
• Four key switch: same adhering to the simple style, not pursuing more, contracted, save for the limited resources, NiosII IO of external keystroke, interruption of experimental sufficient

1.4 List of EP3C25Q240C8 T3C25-V5FGPA development board kit

1. The core board piece,
2. Experimental board piece,
3. A ByteBlasterII download line,
4. USB line a root,
5. A 5-v switch power,
6. DVD a range of software (containing QuartusII7.2 and NiosII IDE7.2 edition), manual, documentation and detailed circuit principle diagram (PDF), Provided such chips FPGA protel format components package diagram.

1.5 EP3C25Q240C8 T3C25-V5FGPA development board kit experiment

1. FPGA_LED,
2. 4 for 7 digital pipe display dynamic scanning,
3. PS2 keyboard interface circuit design,
4. Buzzer instrument experiment,
5. LCD display experiment,
6. UART serial communication experiment,
7. VGA signal generator experiment,
8. Read the I2C bus EEPROM,
9. To convert data acquisition experiment, -
10. DA digital-to-analog experiment,